Test WRW+2W+data+dmb.st

ARM WRW+2W+data+dmb.st
"Rfe DpDatadW Wse DMB.STdWW Wse"
Cycle=Rfe DpDatadW Wse DMB.STdWW Wse
Prefetch=0:x=F,1:x=F,1:y=W,2:y=F,2:x=W
Com=Rf Ws Ws
Orig=Rfe DpDatadW Wse DMB.STdWW Wse
{
%x0=x;
%x1=x; %y1=y;
%y2=y; %x2=x;
}
 P0           | P1           | P2           ;
 MOV R0,#2    | LDR R0,[%x1] | MOV R0,#2    ;
 STR R0,[%x0] | EOR R1,R0,R0 | STR R0,[%y2] ;
              | ADD R1,R1,#1 | DMB ST       ;
              | STR R1,[%y1] | MOV R1,#1    ;
              |              | STR R1,[%x2] ;
exists (1:R0=2 /\ [x]=2 /\ [y]=2)